Source de Timer_2

stm8/
; Declarations requise pour demarrer le simulateur
synoptic EQU "WCv@vP_w"
;synoptic EQU "85dEF3ms"

Acc EQU 10
PC EQU $8080
SP EQU $7FF

; Def de TIM2
TIM2_CR1   EQU $5300 ; control register 1
TIM2_IER   EQU $5303 ; interrupt enable regsiter
TIM2_SR1   EQU $5304 ; status register
TIM2_EGR   EQU $5306 ; event generation register
TIM2_CNTRH EQU $530C ; counter register
TIM2_CNTRL EQU $530D
TIM2_PSCR  EQU $530E ; prescaler register
TIM2_ARRH  EQU $530F ; auto-reload register
TIM2_ARRL  EQU $5310 ;

; Masque associes
TIM2_CR1_ARPE EQU $80 ; auto-reload preload enable mask
TIM2_CR1_OPM  EQU $08 ; one pulse mode mask
TIM2_CR1_URS  EQU $04 ; update request source mask
TIM2_CR1_UDIS EQU $02 ; update disable mask
TIM2_CR1_CEN  EQU $01 ; counter enable

TIM2_IER_UIE  EQU $01 ; update interrupt enable mask

TIM2_SR1_UIF  EQU $01 ; update interrupt flag mask

TIM2_EGR_UG   EQU $01 ; update generation mask

TIM2_PSCR_PSC EQU $07 ; prescaler value mask

; Def du GPIO
PA_ODR EQU $5000
PA_IDR EQU $5001
PA_DDR EQU $5002
PA_CR1 EQU $5003
PA_CR2 EQU $5004

PB_ODR EQU $5005
PB_IDR EQU $5006
PB_DDR EQU $5007
PB_CR1 EQU $5008
PB_CR2 EQU $5009

PC_ODR EQU $500A
PC_IDR EQU $500B
PC_DDR EQU $500C
PC_CR1 EQU $500D
PC_CR2 EQU $500E

PA3 EQU $08
MSK_LED EQU $3C
MSK_SWITCH EQU $1E
UN          EQU $60
DEUX        EQU $DA

Data segment byte at: 00-10 'Ram'
cnt ds.b  ; loop counter
addresse ds.w ; addresse

debut STRING "SALUT"
fin ds.b  ; fin de la chaine

Pile segment byte at: 7F0-7FF 'Ram'

Gpio segment byte at: 5000-5010 'Gpio'
Tim2 segment byte at: 5300-5310 'Tim2'

; le segment contenant les vecteurs d'interruption
vectit segment byte at: 8000-807F 'Flash'
    INT Start                ; reset
    INT NonHandledInterrupt  ; trap
    INT NonHandledInterrupt  ; irq0 TLI External top level interrupt
    INT NonHandledInterrupt  ; irq1 AWU Auto wake up from halt
    INT NonHandledInterrupt  ; irq2 CLK Clock Controller
    INT NonHandledInterrupt  ; irq3 EXTIO Port A external
    INT NonHandledInterrupt  ; irq4 EXTI1 Port B
    INT NonHandledInterrupt  ; irq5 EXTI2 Port C
    INT NonHandledInterrupt  ; irq6 EXTI3 Port D
    INT NonHandledInterrupt  ; irq7 EXTI4 Port E external
    INT NonHandledInterrupt  ; irq8  reserved
    INT NonHandledInterrupt  ; irq9  reserved
    INT NonHandledInterrupt  ; irq10 SPI end of transfer
    INT NonHandledInterrupt  ; irq11 TIM1 Update/overflow/underflow/trigger/break
    INT NonHandledInterrupt  ; irq12 TIM1 Capture/Compare
    INT TIM2_Update          ; irq13 TIM2 update/overflow
    INT NonHandledInterrupt  ; irq14 TIM2 capture / compare
    INT NonHandledInterrupt  ; irq15 TIM3 Update/ overflow
    INT NonHandledInterrupt  ; irq16 TIM3 Capture / Compare
    INT NonHandledInterrupt  ; irq17 reserved
    INT NonHandledInterrupt  ; irq18 reserved
    INT NonHandledInterrupt  ; irq19 I2C
    INT NonHandledInterrupt  ; irq20 Uart2 Tx Complete
    INT NonHandledInterrupt  ; irq21 Uart2 Receive Register Data Full
    INT NonHandledInterrupt  ; irq22 ADC1 end of conversion
    INT NonHandledInterrupt  ; irq23 TIM4 Update/Overflow
    INT NonHandledInterrupt  ; irq24 Flash EOP/WR_PG_DIS
    INT NonHandledInterrupt  ; irq25 reserved
    INT NonHandledInterrupt  ; irq26 reserved
    INT NonHandledInterrupt  ; irq27 reserved
    INT NonHandledInterrupt  ; irq28 reserved
    INT NonHandledInterrupt  ; irq29 reserved

; le segment contenant le CODE doit avoir l'etiquette 'code'
code segment byte at: 8080-80C0 'Flash'
Start   HALT

Code segment byte at: 8080-808F 'Flash'
   ; Initialisation des leds open drain
   LDW X,#PB_ODR  ; On charge X avc l'adresse du port A, pas le contenu du premier registre du port A
   LD A,#$FF
   CALL gpio_sortie
   MOV PB_ODR,#$55

; initialisation des switch
   ;LDW X,#PC_ODR
   ;LD A,#MSK_SWITCH
   ;CALL gpio_entree

; Initialisation du timer2
   ;MOV TIM2_PSCR,#14  ; 16384, 16 MHz/16384 == 976,5625 Hz
   MOV TIM2_PSCR,#1  ; 16384, 16 MHz/16384 == 976,5625 Hz
   ;MOV TIM2_ARRH,#$03 ; ARR == 0x03DA environ 1Hz
   ;MOV TIM2_ARRL,#$D1
   MOV TIM2_ARRH,#$00 ; ARR == 0x03DA environ 1Hz
   MOV TIM2_ARRL,#$10
   ; Activation des interruptions sur update
   LD A,TIM2_IER
   OR A,#TIM2_IER_UIE
   LD TIM2_IER,A
   ; Activation du compteur
   LD A,TIM2_CR1
   OR A,#TIM2_CR1_CEN
   LD TIM2_CR1,A
   
;  non BREAK         ; point d'arret
   CLR cnt

boucle 
   JRA boucle

; Initialisation d'un GPIO en entree X -> Port, A -> Masque des lignes
   ; Px_DDR = Px_DDR & ^ Masque
gpio_entree PUSH A
   CPL A 
   AND A,($2,X)
   LD ($2,X),A
   ; Px_CR1 = Px_CR1 & ^ Masque
   LD A,($1,SP) 
   CPL A 
   AND A,($3,X)
   LD ($3,X),A
   ; Px_CR2 = Px_CR2 & ^ Masque
   LD A,($1,SP) 
   CPL A 
   AND A,($4,X)
   LD ($4,X),A
   POP A
   RET

; Initialisation d'un GPIO en sortie X -> Port, A -> Masque des lignes
   ; Px_DDR = Px_DDR | Masque
gpio_sortie PUSH A
   OR A,($2,X)
   LD ($2,X),A
   ; Px_CR1 = Px_CR1 & ^ Masque
   LD A,($1,SP) 
   CPL A 
   AND A,($3,X)
   LD ($3,X),A
   ; Px_CR2 = Px_CR2 & ^ Masque
   LD A,($1,SP) 
   CPL A 
   AND A,($4,X)
   LD ($4,X),A
   POP A
   RET

INTERRUPT NonHandledInterrupt
NonHandledInterrupt
    iret

INTERRUPT TIM2_Update
TIM2_Update ; Juste un clignotement
   TRAP
   LD A,PB_ODR
   AND A,#$80
   JREQ inegal
   LD A,#UN
   JRA fin_tim2_update
inegal LD A,#DEUX
fin_tim2_update
   LD PB_ODR,A
   IRET